S. Mukherjee, P. Jibesh, and Roy. Suchismita,"Congestion Balancing Global Router", in VDAT: 17th international symposium, vdat 2013, jaipur, india, july 27-30, 2013, revised selected papers, pp.223--232 2013, 10.1007/978-3-642-42024-5_27       Inproceedings

S. Mukherjee and S. Roy,"graph colouring based multi pin net detailed routing for fpga using sat", in 2013 3rd ieee international advance computing conference (iacc), pp.308--312 2013, 10.1109/IAdCC.2013.6514241       Inproceedings

S. Mukherjee and S. Roy,"SAT Based Multi Pin Net Detailed Routing for FPGA", in 2010 International Symposium on Electronic System Design, pp.141-146 2010, 10.1109/ISED.2010.35       Inproceedings