P. Datta and S. Mukherjee,"Global Placement for Large-scale Mixed-size Design VLSI Circuits using Plant Model", in 2018 Second International Conference on Electronics, Communication and Aerospace Technology (ICECA), pp.1577-1581, IEEE, Coimbatore, India, March 2018, 10.1109/ICECA.2018.8474900       Inproceedings

P. Datta and S. Mukherjee,"IPplacer: An Efficient 0-1 Integer Programming Based Placement for VLSI Circuits", in 2018 9th international conference on computing, communication and networking technologies (icccnt), pp.1--7 2018, 10.1109/ICCCNT.2018.8493709       Inproceedings

S. Mukherjee, A. Nainwal, C. Das, and S. Purkayastha,"An Alternate Algorithmic Approach to FPGA Placement", in 2018 9th international conference on computing, communication and networking technologies (icccnt), pp.1--6 2018, 10.1109/ICCCNT.2018.8493947       Inproceedings

S. Kundu, S. Roy, and S. Mukherjee,"K-nearest neighbour (KNN) approach using SAT based technique for rectilinear steiner tree construction", in 2017 7th international symposium on embedded computing and system design (ised), pp.1--5 2017, 10.1109/ISED.2017.8303915       Inproceedings

S. Mukherjee and Roy. Suchismita,"Via-Aware Dogleg Routing Using Boolean Satisfiability", Journal of Circuits, Systems and Computers, vol.26, no.04, pp.1750064, World Scientific Publishing Company 2017, 10.1142/S0218126617500645       Article

S. Purkayastha and S. Mukherjee,"Lookahead legalization based global placement for heterogeneous FPGAs", in 2017 7th international symposium on embedded computing and system design (ised), pp.1--5 2017, 10.1109/ISED.2017.8303929       Inproceedings

S. Kundu, S. Roy, and S. Mukherjee,"SAT based rectilinear steiner tree construction", in 2016 2nd international conference on applied and theoretical computing and communication technology (icatcct), pp.623--627 2016, 10.1109/ICATCCT.2016.7912075       Inproceedings

S. Mukherjee and Roy. Suchismita,"Sat based solutions for detailed routing of island style fpga architectures", Microelectronics journal, vol.46, no.8, pp.706--715, Elsevier 2015, 10.1016/j.mejo.2015.05.003       Article

S. Mukherjee and Roy. Suchismita,"Nearly-2-SAT Solutions for Segmented-Channel Routing", IEEE Transactions on Computer-aided Design of integrated circuits and systems, vol.35, no.1, pp.128--140, IEEE 2015, 10.1109/TCAD.2015.2446950       Article

S. Mukherjee and S. Roy,"Multi terminal net routing for island style FPGAs using nearly-2-SAT computation", in 2015 19th international symposium on vlsi design and test, pp.1--6 2015, 10.1109/ISVDAT.2015.7208142       Inproceedings