V. K. Sharma, U. C. Pati, and K. Mahapatra,"A simple VLSI architecture for computation of 2D DCT, quantisation and zig-zag ordering for JPEG", International Journal of Signal and Imaging Systems Engineering, vol.5, no.1, pp.58-65, Inderscience Enterprises, December 2012, 10.1504/IJSISE.2012.046743 Article
R. K. Senapati, U. C. Pati, and K. Mahapatra,"A low complexity embedded image coding algorithm using Hierarchical Listless DTT", in 2011 8th International Conference on Information, Communications and Signal Processing (ICICS), IEEE, Singapore, December 2011, 10.1109/ICICS.2011.6174297 Inproceedings
V. K. Sharma, K. Mahapatra, and U. C. Pati,"An efficient distributed arithmetic based VLSI architecture for DCT", in 2011 International Conference on Devices and Communications (ICDeCom),, IEEE, icdecom, Ranchi, India, February 2011, 10.1109/ICDECOM.2011.5738484 Inproceedings
R. K. Senapati, U. C. Pati, and K. Mahapatra,"A novel hybrid HVS based embedded imagecoding algorithm using DTT and SPIHT", in 2011 International Conference on Devices and Communications (ICDeCom), IEEE, Mesra,Ranchi, India, February 2011, 10.1109/ICDECOM.2011.5738493 Inproceedings
R. K. Senapati, U. C. Pati, and K. Mahapatra,"A fast zigzag-pruned 4×4 DTT algorithm for image compression", WSEAS Transactions on Signal Processing, vol.7, no.1, pp.34-43, ACM digital library, January 2011 Article
V. K. Sharma, R. Agrawal, U. C. Pati, and K. Mahapatra,"2-D separable discrete hartley transform architecture for efficient FPGA resource", in 2010 International Conference on Computer and Communication Technology (ICCCT),, pp.236-241, IEEE, Allahabad 2010, 10.1109/ICCCT.2010.5640432 Inproceedings
R. K. Senapati, U. C. Pati, and K. Mahapatra,"A novel fast zigzag prune 4×4 discrete tchebichef moment based image compression algorithm", in 2010 International Conference on Computational Intelligence and Communication Networks (CICN), pp.73-78, IEEE, Bhopal, India, November 2010, 10.1109/CICN.2010.25 Inproceedings
R. Senapati, U. C. Pati, and K. Mahapatra,"A low complexity orthogonal 8×8 transform matrix for fast image compression", in 2010 Annual IEEE India Conference (INDICON), IEEE, Kolkata, India, December 2010, 10.1109/INDCON.2010.5712707 Inproceedings
V. K. Sharma, U. C. Pati, and K. Mahapatra,"An study of removal of subjective redundancy in JPEG for low cost, low power, computation efficient circuit design and high compression image", in 2010 International Conference on Power, Control and Embedded Systems (ICPCES),, IEEE, Allahabad, India 2010, 10.1109/ICPCES.2010.5698667 Inproceedings
S. Pattnaik, A. K. Panda, and K. Mahapatra,"Efficiency improvement of synchronous buck converter by passive auxiliary circuit", IEEE Transactions on Industry Applications, vol.46, no.6, pp.2511-2517, IEEE Xplore, November 2010, 10.1109/TIA.2010.2070831 Article