D. Nayak, D. P. Acharya, and K. Mahapatra,"Current starving the SRAM Cell: A strategy to improve cell stability and power", Circuits, Systems, and Signal Processing, vol.36, no.8, pp.3047–3070, Springer, August 2017, 10.1007/s00034-016-0466-5       Article

S. Kumar, A. K. Sahoo, U. K. Sahoo, and D. P. Acharya,"QR-based robust diffusion strategies for wireless sensor networks using minimum-wilcoxon-norm", IET Signal Processing, vol.10, no.5, pp.439-448, Institution of Engineering and Technology, June 2016, 10.1049/iet-spr.2015.0386       Article

S. Kumar, U. K. Sahoo, A. K. Sahoo, and D. P. Acharya,"Diffusion minimum-Wilcoxon-norm over distributed adaptive networks: formulation and performance analysis", Digital Signal Processing, vol.51, pp.156-169, Elsevier, April 2016, 10.1016/j.dsp.2016.02.001       Article

U. Nanda, D. P. Acharya, and S. K. Patra,"Design of an efficient phase frequency detector to reduce blind zone in a PLL", Microsystem Technologies, pp.1-7, Springer, May 2016, 10.1007/s00542-016-2970-8       Article

P. K. Rout and D. P. Acharya,"Fast physical design of CMOS ROs for optimal performance using constrained NSGA-II", AEU - International Journal of Electronics and Communications, vol.69, no.9, pp.1233-1242, Elsevier, September 2015, 10.1016/j.aeue.2015.05.004       Article

D. P. Acharya, P. K. Rout, and G. Panda,"A multiobjective optimization based fast and robust design methodology for low power and low phase noise current starved VCO", IEEE Transactions on Semiconductor Manufacturing, vol.27, no.1, pp.43-50, IEEE, December 2014, 10.1109/TSM.2013.2295423       Article

U. Nanda, D. P. Acharya, and S. K. Patra,"A new transmission gate cascode current mirror charge pump for fast locking low noise PLL", Circuits, Systems, and Signal Processing, vol.33, no.9, pp.2709-2718, Birkhauser, September 2014, 10.1007/s00034-014-9785-6       Article

U. Nanda, D. P. Acharya, and S. K. Patra,"Low noise and fast locking phase locked loop using a variable delay element in the phase frequency detector", Journal of Low Power Electronics, vol.10, no.1, pp.53-57, American Scientific Publishers, October 2014, 10.1166/jolpe.2014.1294       Article

P. Amitav, S. K. Patra, and D. P. Acharya,"SINR and cost based vertical handoff scheme for k-tier heterogeneous wireless network", international journal of computer applications, vol.108, no.1, citeseer 2014, 10.1.1.684.5241       Article

U. Nanda, D. P. Acharya, and S. K. Patra,"Design of a low noise PLL for GSM application", in 2013 International conference on Circuits, Controls and Communications (CCUBE), pp.1-4, IEEE, CHANNASANDRA BENGALURU, India, December 2013, 10.1109/CCUBE.2013.6718578       Inproceedings