Module-I: Introduction / Practice Session [ 3 hr.]

• Motivation of the work and design procedures and components to be used through the laboratory sessions.
• Learning Proteus Environment for simulation of circuits with microcontroller
• Learning Filter Design & Analysis (FDA) toolbox of MATLAB

Module-II: ADC-0808 and DAC-0808 interfacing [ 6 hr.]

• Input Sinusoidal Signal of variable amplitude & frequency
• Develop RTOS to measure the input & output (after DAC) amplitude & frequency
• Tabulate at least 20 reading and find the limitation of your system

Module-III: Design Low pass (LP) with FIR structure of 2nd order [ 9 hr.]

• Cut-off frequencies for LP is last 4-digit of lowest Roll number of your group in Hz.
• Develop RTOS–with FIFO structure for signal access–to realize the filters in the circuit developed in Task-1
• Consider integer, fixed point precision for computation
• Tabulate readings for each of the occasions and each type of filters to get frequency response and compare it with the frequency responses obtained in MATLAB FDA tool
• Measure latency of your system i.e. time delay between occurrence i/p to o/p
• Analyse and comment if the filter specification is met
Draw RTL schematic for this design.

Module-IV: Design Low pass (LP) with IIR structure of order higher than 4 [ 9 hr.]

• Cut-off frequencies for LP is last 4-digit of lowest Roll number of your group in Hz
• Develop RTOS–with FIFO structure for signal access–to realize the filters in the circuit developed in Task-1-2
• Consider integer, fixed point precision for computation
• Consider full order realization & cascaded 2nd order filters realization
• Tabulate readings for each of the occasions of filter precision and structure (full & cascaded) to get frequency
response and compare it with the frequency responses obtained in MATLAB FDA tool
• Measure latency of your system i.e. time delay between occurrence i/p to o/p
• Analyse your system if the filter specification is met and is stable, what is the minimum precision required, if the stability depends on order
• Draw RTL schematic for this design.

Module-V: Hardware realization [ 9 hr.]

Hardware realization of either of the filters designed in Tasks 2-5 on system developed in Task 1 on bread boards

Prepare students
1. To understand extraction of information from datasheets
2. To develop circuits with processor in an Integrated Development Environment (IDE)
3. To able to design digital filters with software tool
4. To debug hardware and firmware of a digital filter in a simulator
5. To realize hardware and test digital filters with embedded system

At the end of the course, students will be able to
CO1. Apply Filter Design Tool of MATLAB for designing FIR & IIR filters with given specification
CO2. Write compact Real-time Operating System (RTOS) for Digital Signal Processing (DSP) System
CO3. Simulate digital filters with signal interfaces with embedded processor 8051 in Proteus IDE
CO4. Determine performance of FIR & IIR digital filter with the simulator
CO5. Realize stable digital filter of 2nd & higher order FIR/IIR filter & signal interfaces on hardware

Anonymous, DATA SHEETs of various ICs,, Respective Manufacturer , Download from web site

Anonymous, User Manual of Software, Simulator for Microcontroller/microprocessor, Respective Manufacturer , Download from web site

John G Proakis, Dimitris Manolakis, Digital Signal Processing: Principles, Algorithms, and Applications, Pearson Education India , 4th Ed. 2007 or Latest